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zkVM Underconstrained VulnerabilityGHSA-g3qg-6746-3mg9

Fix: risc0/risc0#3181

GHSA-g3qg-6746-3mg9 is a CWE-345 vulnerability in risc0-zkvm. A fix is available for risc0-zkvm — see the affected versions and patch details below.

Also known asCVE-2025-52484
Published
Updated
Affected
2 pkgs
Patched
2 / 2
Exploits
None indexed
Exploitation data as of Nov 6, 2026 · OSV.dev, NVD, FIRST.org (EPSS)

Exploitation Status

No confirmed exploitation observed yet

  • CISA assesses this as automatable — exploitation doesn’t require manual, per-target effort, which raises the odds of mass scanning and opportunistic attacks.
  • CISA’s own triage has not observed active exploitation or public proof-of-concept code for this CVE as of its last assessment.

Exploitation and automatability from CISA’s SSVC triage for GHSA-g3qg-6746-3mg9.

EPSS Exploitation Probability

via FIRST.org ↗
0.3%probability of exploitation in next 30 days
Lower Risk0.00%
Lower risk than most CVEs19th percentile — riskier than 19% of all scored CVEsHighest risk
0.00%0.26%0.51%0.77%0.2%0.3%May 26Sep 26Nov 26

Probability of exploitation in the next 30 days, from FIRST.org EPSS.

Real-World Exposure

2 pkgs affected
🦀risc0-zkvm🦀risc0-circuit-rv32im

Real-time download stats are indexed for npm and PyPI packages. This vulnerability affects crates.io packages — download data is not available via public APIs for these ecosystems.

Description

Due to a missing constraint in the rv32im circuit, any 3-register RISC-V instruction (including remu and divu) in risc0-zkvm 2.0.0, 2.0.1, and 2.0.2 are vulnerable to an attack by a malicious prover. The main idea for the attack is to confuse the RISC-V virtual machine into treating the value of the rs1 register as the same as the rs2 register due to a lack of constraints in the rv32im circuit.

This vulnerability was reported by Christoph Hochrainer via our Hackenproof bug bounty. We have evaluated the severity of the vulnerability as “Critical,” and paid a bounty.

The fix for the circuit was implemented in zirgen/pull/238, and the update to risc0 was implemented in risc0/pull/3181. Impacted on-chain verifiers have already been disabled via the estop mechanism outlined in the Verifier Management Design.

Mitigation

We recommend all impacted users upgrade as soon as possible.

Rust applications using the risc0-zkvm crate at versions 2.0.0, 2.0.1, and 2.0.2 should upgrade to version 2.1.0.

Smart contract applications using the official RISC Zero Verifier Router do not need to take any action: zkVM version 2.1 is active on all official routers, and version 2.0 has been disabled.

Smart contract applications not using the verifier router should update their contracts to send verification calls to the 2.1 version of the verifier.

Affected Packages

2 total 2 fixed
EcosystemPackageVulnerable rangeFix
🦀crates.iorisc0-zkvm≥ 2.0.0&&< 2.1.02.1.0cargo update -p risc0-zkvm --precise 2.1.0
🦀crates.iorisc0-circuit-rv32im≥ 2.0.0&&< 2.0.42.0.4cargo update -p risc0-circuit-rv32im --precise 2.0.4

Detection & mitigation playbook

Open-source dependency
  1. Detect

    Scan your dependency tree (package-lock.json, pnpm-lock.yaml, requirements.txt, go.sum, etc.) for risc0-zkvm, including transitive dependencies — a direct dependency you never call can still pull in a vulnerable version.

  2. Fix

    Update risc0-zkvm to 2.1.0 or later, then make sure no transitive (indirect) dependency still pins the vulnerable range — O3 confirms GHSA-g3qg-6746-3mg9 is resolved across your whole dependency graph.

  3. Workarounds

    If you can't upgrade right away: gate or disable the affected feature, validate untrusted input at the boundary, and avoid passing attacker-controlled data into the vulnerable path. O3's runtime protection blocks exploitation in production as an interim safeguard until the upgrade lands.

Frequently Asked Questions

Due to a missing constraint in the rv32im circuit, any 3-register RISC-V instruction (including remu and divu) in risc0-zkvm 2.0.0, 2.0.1, and 2.0.2 are vulnerable to an attack by a malicious prover. The main idea for the attack is to confuse the RISC-V virtual machine into treating the value of the rs1 register as the same as the rs2 register due to a lack of constraints in the rv32im circuit. This vulnerability was reported by Christoph Hochrainer via our Hackenproof bug bounty. We have evaluated the severity of the vulnerability as “Critical,” and paid a bounty. The fix for the circuit w
O3 Security · Impact-Aware SCA

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zkVM Underconstrained Vulnerability