{"id":"CVE-2026-50185","aliases":["GHSA-3rjw-m598-pq24"],"url":"https://o3.security/vulnerability/CVE-2026-50185","summary":"RustCrypto Cmov/CmovEq on aarch64 can produce wrong results if high-bits of registers are set","details":"RustCrypto CMOV provides conditional move CPU intrinsics which are guaranteed on major platforms to execute in constant-time and not be rewritten as branches by the compiler. From 0.1.1 until 0.5.4, the aarch64 implementations of Cmov and CmovEq in cmov/src/backends/aarch64.rs assume high bits are zero-extended when loading values smaller than a register, so set high bits such as [8..] in a Cmov selector or [16..] of self or other in the u16 and i16 CmovEq implementations can cause left.cmovz(&right, condition) to produce incorrect output. This issue is fixed in version 0.5.4.","published":"2026-07-17T18:35:02.078Z","modified":"2026-08-20T03:54:24.708419814Z","cvss":null,"epss":{"score":0.00157,"percentile":0.05159,"asOf":"2026-09-08"},"cisaKev":null,"exploitsKnown":0,"affectedPackages":[{"ecosystem":"crates.io","name":"cmov","fixedVersion":"0.5.4"}],"fix":{"url":"https://github.com/RustCrypto/utils/commit/dba6c355c9f241e3726d5ec2a68f9f3b519f6063","label":"RustCrypto/utils@dba6c35"},"references":[{"type":"WEB","url":"https://github.com/RustCrypto/utils/releases/tag/cmov-v0.5.4"},{"type":"ADVISORY","url":"https://github.com/CVEProject/cvelistV5/tree/main/cves/2026/50xxx/CVE-2026-50185.json"},{"type":"ADVISORY","url":"https://github.com/RustCrypto/utils/security/advisories/GHSA-3rjw-m598-pq24"},{"type":"ADVISORY","url":"https://nvd.nist.gov/vuln/detail/CVE-2026-50185"},{"type":"FIX","url":"https://github.com/RustCrypto/utils/commit/dba6c355c9f241e3726d5ec2a68f9f3b519f6063"}],"provenance":{"sources":["OSV.dev","FIRST.org (EPSS)"],"lastVerified":"2026-08-20T03:54:24.708419814Z"}}